This invention relates to a semiconductor device. More particularly, the invention concerns a high frequency, high output bipolar transistor.
In order to increase the power gain of high frequency, high output bipolar transistors at high frequencies, various means have been previously proposed to decrease the base resistance thereof. For example, prior art means include a graft base structure including an active and an inactive base region, a structure including an emitter region surrounded by a base region, a multi-emitter structure (which is also called a comb structure) having emitter stripes which are very narrow in width. Also, in order to decrease the capacitance of the base-to-collector junction, a prior art method proposed the decreasing of an impurity concentration of the particular semiconductor region toward which a depletion layer from the base-to-collector junction spreads.
In conventional bipolar transistors, as described above, the base-to-collector junction has extended substantially over the entire area of a semiconductor wafer, resulting in a disadvantage in that the capacitance of the external base-to-collector junction is particularly large. Isoplanar silicon bipolar transistors, which are commercially available, have been improved with respect to this disadvantage by effecting the insulator width isolation of the inactive base region which is continuous to the base-to-collector junction through the utilization of selective oxidization. However, the manufacturing of such transistors has included manufacturing steps which are complicated. Also, in their manufacturing, an erosion effect called "a bird beak effect" might occur in portions of the silicon of the transistors. This bird beak effect is apt to permit either end of the emitter region to extend over the mating base region so as to be connected to the collector region. Even if the emitter region is not connected to the collector region, it has been difficult to control the base width.
Accordingly, it is the principal object of the present invention to eliminate the disadvantages of the prior art practice as described above by the provision of a semiconductor device which has a sharply decreased capacitance of its base-to-collector junction.
It is an object of the present invention to provide a semiconductor device designed and constructed so as to sharply decrease its base resistance.